About US
● We have Deep knowledge in functional verification using advance verification methodologies such as VERA, VMM, OVM, UVM, SystemVerilog.
● We have Worked on all stages of functional verification from defining verification strategy, testplan development, defining functional coverage goals, development of full verification testbench & environment components like driver, monitor, reference model, scoreboard, sequences, testscases to bug reporting, regression runs and coverage closure.
● Our team has Developed Test strategy derived from RISC V specifications and comprehensive test suites in assembly for extensions I, M, A, C, Zfhmin, Za64rs, single and double precision floating points F And D and Vector. Also developed confirmatory test suit in assembly for each of the above extensions. Used SPIKE RISC-V reference model for tests suite development.
● We are Working on Modem based SOC. Developing UVM based subsystem level verification testbench for Control plan block which is responsible for full chip configuration.
● Block level, cluster or subsystem level and SOC level verification.
● We have been Developing testbench from basics.
● We have Developed sequence layering, virtual sequences.
● We have Register Abstraction Layer based register verification.
● Our team has Applied constrained random techniques to find early bugs.
● Our team has Exposure to formal equivalence technique of Jasper.
● We have Worked on GLS.
Various domains worked on:
● We have Developed RISC-V ISA confirmatory test suites for extensions I, A, M, C, F single and double precision Floating point, Misaligned load/stores, Machine mode, Supervisor mode and Vector Ext.
● We have done Assembly language test suite development with SPIKE RISC V ISA simulator.
● UVM based subsystem verification testbench for Modem SOC.
● Exposure to transport layer functionality and verification.
● OTN 400G FPGA bridge 8x 50G to 16x 25G interfaces.
● 5G integrated digital transceiver used in Broadband Direct-RF (DRF) application.
● Motion sensor chips
Director
Shailesh Vasekar

